module barrl16f Title 'Multi-mode 16-bit Barrel Shifter' " Inputs and Outputs DIN15..DIN0, S3..S0, C2..C0 pin; DOUT15..DOUT0 pin istype 'com'; S = [S3..S0]; " Shift amount C = [C2..C0]; " Shift mode L = DIN15; " MSB R = DIN0; " LSB ROL = (C == [0,0,0]); " Rotate (circular shift) left ROR = (C == [0,0,1]); " Rotate (circular shift) right SLL = (C == [0,1,0]); " Shift logical left (shift in 0s) SRL = (C == [0,1,1]); " Shift logical right (shift in 0s) SLA = (C == [1,0,0]); " Shift left arithmetic (replicate LSB) SRA = (C == [1,0,1]); " Shift right arithmetic (replicate MSB) equations [DOUT15..DOUT0] = ROL & (S==0) & [DIN15..DIN0] # ROL & (S==1) & [DIN14..DIN0,DIN15] # ROL & (S==2) & [DIN13..DIN0,DIN15..DIN14] # ROL & (S==3) & [DIN12..DIN0,DIN15..DIN13] # ROL & (S==4) & [DIN11..DIN0,DIN15..DIN12] # ROL & (S==5) & [DIN10..DIN0,DIN15..DIN11] # ROL & (S==6) & [DIN9..DIN0,DIN15..DIN10] # ROL & (S==7) & [DIN8..DIN0,DIN15..DIN9] # ROL & (S==8) & [DIN7..DIN0,DIN15..DIN8] # ROL & (S==9) & [DIN6..DIN0,DIN15..DIN7] # ROL & (S==10) & [DIN5..DIN0,DIN15..DIN6] # ROL & (S==11) & [DIN4..DIN0,DIN15..DIN5] # ROL & (S==12) & [DIN3..DIN0,DIN15..DIN4] # ROL & (S==13) & [DIN2..DIN0,DIN15..DIN3] # ROL & (S==14) & [DIN1..DIN0,DIN15..DIN2] # ROL & (S==15) & [DIN0,DIN15..DIN1] # ROR & (S==0) & [DIN15..DIN0] # ROR & (S==1) & [DIN0,DIN15..DIN1] # ROR & (S==2) & [DIN1..DIN0,DIN15..DIN2] # ROR & (S==3) & [DIN2..DIN0,DIN15..DIN3] # ROR & (S==4) & [DIN3..DIN0,DIN15..DIN4] # ROR & (S==5) & [DIN4..DIN0,DIN15..DIN5] # ROR & (S==6) & [DIN5..DIN0,DIN15..DIN6] # ROR & (S==7) & [DIN6..DIN0,DIN15..DIN7] # ROR & (S==8) & [DIN7..DIN0,DIN15..DIN8] # ROR & (S==9) & [DIN8..DIN0,DIN15..DIN9] # ROR & (S==10) & [DIN9..DIN0,DIN15..DIN10] # ROR & (S==11) & [DIN10..DIN0,DIN15..DIN11] # ROR & (S==12) & [DIN11..DIN0,DIN15..DIN12] # ROR & (S==13) & [DIN12..DIN0,DIN15..DIN13] # ROR & (S==14) & [DIN13..DIN0,DIN15..DIN14] # ROR & (S==15) & [DIN14..DIN0,DIN15] # SLL & (S==0) & [DIN15..DIN0] # SLL & (S==1) & [DIN14..DIN0,0] # SLL & (S==2) & [DIN13..DIN0,0,0] # SLL & (S==3) & [DIN12..DIN0,0,0,0] # SLL & (S==4) & [DIN11..DIN0,0,0,0,0] # SLL & (S==5) & [DIN10..DIN0,0,0,0,0,0] # SLL & (S==6) & [DIN9..DIN0,0,0,0,0,0,0] # SLL & (S==7) & [DIN8..DIN0,0,0,0,0,0,0,0] # SLL & (S==8) & [DIN7..DIN0,0,0,0,0,0,0,0,0] # SLL & (S==9) & [DIN6..DIN0,0,0,0,0,0,0,0,0,0] # SLL & (S==10) & [DIN5..DIN0,0,0,0,0,0,0,0,0,0,0] # SLL & (S==11) & [DIN4..DIN0,0,0,0,0,0,0,0,0,0,0,0] # SLL & (S==12) & [DIN3..DIN0,0,0,0,0,0,0,0,0,0,0,0,0] # SLL & (S==13) & [DIN2..DIN0,0,0,0,0,0,0,0,0,0,0,0,0,0] # SLL & (S==14) & [DIN1..DIN0,0,0,0,0,0,0,0,0,0,0,0,0,0,0] # SLL & (S==15) & [DIN0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0] # SRL & (S==0) & [DIN15..DIN0] # SRL & (S==1) & [0,DIN15..DIN1] # SRL & (S==2) & [0,0,DIN15..DIN2] # SRL & (S==3) & [0,0,0,DIN15..DIN3] # SRL & (S==4) & [0,0,0,0,DIN15..DIN4] # SRL & (S==5) & [0,0,0,0,0,DIN15..DIN5] # SRL & (S==6) & [0,0,0,0,0,0,DIN15..DIN6] # SRL & (S==7) & [0,0,0,0,0,0,0,DIN15..DIN7] # SRL & (S==8) & [0,0,0,0,0,0,0,0,DIN15..DIN8] # SRL & (S==9) & [0,0,0,0,0,0,0,0,0,DIN15..DIN9] # SRL & (S==10) & [0,0,0,0,0,0,0,0,0,0,DIN15..DIN10] # SRL & (S==11) & [0,0,0,0,0,0,0,0,0,0,0,DIN15..DIN11] # SRL & (S==12) & [0,0,0,0,0,0,0,0,0,0,0,0,DIN15..DIN12] # SRL & (S==13) & [0,0,0,0,0,0,0,0,0,0,0,0,0,DIN15..DIN13] # SRL & (S==14) & [0,0,0,0,0,0,0,0,0,0,0,0,0,0,DIN15..DIN14] # SRL & (S==15) & [0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,DIN15] # SLA & (S==0) & [DIN15..DIN0] # SLA & (S==1) & [DIN14..DIN0,R] # SLA & (S==2) & [DIN13..DIN0,R,R] # SLA & (S==3) & [DIN12..DIN0,R,R,R] # SLA & (S==4) & [DIN11..DIN0,R,R,R,R] # SLA & (S==5) & [DIN10..DIN0,R,R,R,R,R] # SLA & (S==6) & [DIN9..DIN0,R,R,R,R,R,R] # SLA & (S==7) & [DIN8..DIN0,R,R,R,R,R,R,R] # SLA & (S==8) & [DIN7..DIN0,R,R,R,R,R,R,R,R] # SLA & (S==9) & [DIN6..DIN0,R,R,R,R,R,R,R,R,R] # SLA & (S==10) & [DIN5..DIN0,R,R,R,R,R,R,R,R,R,R] # SLA & (S==11) & [DIN4..DIN0,R,R,R,R,R,R,R,R,R,R,R] # SLA & (S==12) & [DIN3..DIN0,R,R,R,R,R,R,R,R,R,R,R,R] # SLA & (S==13) & [DIN2..DIN0,R,R,R,R,R,R,R,R,R,R,R,R,R] # SLA & (S==14) & [DIN1..DIN0,R,R,R,R,R,R,R,R,R,R,R,R,R,R] # SLA & (S==15) & [DIN0,R,R,R,R,R,R,R,R,R,R,R,R,R,R,R] # SRA & (S==0) & [DIN15..DIN0] # SRA & (S==1) & [L,DIN15..DIN1] # SRA & (S==2) & [L,L,DIN15..DIN2] # SRA & (S==3) & [L,L,L,DIN15..DIN3] # SRA & (S==4) & [L,L,L,L,DIN15..DIN4] # SRA & (S==5) & [L,L,L,L,L,DIN15..DIN5] # SRA & (S==6) & [L,L,L,L,L,L,DIN15..DIN6] # SRA & (S==7) & [L,L,L,L,L,L,L,DIN15..DIN7] # SRA & (S==8) & [L,L,L,L,L,L,L,L,DIN15..DIN8] # SRA & (S==9) & [L,L,L,L,L,L,L,L,L,DIN15..DIN9] # SRA & (S==10) & [L,L,L,L,L,L,L,L,L,L,DIN15..DIN10] # SRA & (S==11) & [L,L,L,L,L,L,L,L,L,L,L,DIN15..DIN11] # SRA & (S==12) & [L,L,L,L,L,L,L,L,L,L,L,L,DIN15..DIN12] # SRA & (S==13) & [L,L,L,L,L,L,L,L,L,L,L,L,L,DIN15..DIN13] # SRA & (S==14) & [L,L,L,L,L,L,L,L,L,L,L,L,L,L,DIN15..DIN14] # SRA & (S==15) & [L,L,L,L,L,L,L,L,L,L,L,L,L,L,L,DIN15]; end barrl16f